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Peripheral Allocation

Programmable Load CPU Board

CAN0: Expansion PA22 (TX), PA23 (RX) SERCOM0: I2C, front panel/rear IO (through mux) ...

Updated 2 weeks ago by Tristan Seifert

Front Panel

Programmable Load IO

The front panel features a few buttons, indicators, and a rotary encoder. Overview Note that ...

Updated 3 weeks ago by Tristan Seifert

Hardware Errata

Programmable Load Load Driver

This page lists some issues with the hardware. Rev 2 Holes for current sense resistors should...

Updated 3 weeks ago by Tristan Seifert

Properties

Programmable Load Remote Control

This page describes the "property request" mechanism, as well as the message format used to inter...

Updated 4 weeks ago by Tristan Seifert

Protocol

Programmable Load Remote Control

This page describes the native communications protocol with the device. It is binary based, with ...

Updated 4 weeks ago by Tristan Seifert

Rear Panel

Programmable Load IO

On the rear of the device are a few auxiliary connections, including AC power input, communicatio...

Updated 4 weeks ago by Tristan Seifert

DMA Channel Allocations

Programmable Load CPU Board

DMAC should operate with dynamic, round-robin priority arbitration within a DMA priority level. P...

Updated 1 month ago by Tristan Seifert

Rear IO Errata

Programmable Load IO

Rev 1 Copper rings around USB connector pads should be larger Retention holes for Ethernet ja...

Updated 1 month ago by Tristan Seifert

Front Panel Errata

Programmable Load IO

Rev 1 Mode/load switches footprints need soldermask pulled back from pads The pads are cove...

Updated 1 month ago by Tristan Seifert

Adjustments

Programmable Load Load Driver

The driver boards need to have done to work. Rev 1 Current driver zero offset Trimmers: RV301,...

Updated 1 month ago by Tristan Seifert

Hardware Errata

Programmable Load CPU Board

This page lists some issues with CPU board hardware, as they are discovered, and some workarounds...

Updated 1 month ago by Tristan Seifert

Clocking

Programmable Load CPU Board

Clock Inputs All clocks on the system are derived from one of the following clock inputs (oscill...

Updated 1 month ago by Tristan Seifert

Revisions

68komputer Backplane Management

This page lists any assembly remarks and issues with each revision of the board. Rev 1 5V pow...

Updated 2 months ago by Tristan Seifert

6 Slot Backplane

68komputer Backplane

A backplane which supports up to six expansion cards, meant to go into a 3U VME crate. Feature...

Updated 2 months ago by Tristan Seifert

Overview

68komputer Backplane Management

Unlike other expansion boards, this one is required to operate the backplane, primarily to power ...

Updated 3 months ago by Tristan Seifert

Pinout

68komputer Backplane

Using 96 position (3x32) DIN 41612 connectors; right angle male on expansion cards, vertical fema...

Updated 3 months ago by Tristan Seifert

Expansion

68komputer 68000 CPU Board

Peripherals can be connected to the CPU board through the expansion connector, a 96-pin, 3 row DI...

Updated 3 months ago by Tristan Seifert

Protocol Overview

Reverse Engineering Pax

This is mostly based off of reading the slightly deobfuscated source code of the Pax WebApp and B...

Updated 3 months ago by Tristan Seifert

Rev1 Assembly Notes

68komputer 68000 CPU Board

Debug board F202 footprint appears to be too large for the fuse ordered (NANOSMDC050F/13.2-2) ...

Updated 4 months ago by Tristan Seifert

System Definitions

Emulashione Core

A system’s devices, busses, clock sources, and connections between all of these are defined in sy...

Updated 6 months ago by Tristan Seifert