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Beacon Packet Structure
This page describes the format of beacon frames. Fixed Part Every beacon frame starts out with ...
Security Schemes
This page describes the security/authentication mechanisms in use by the protocol. Background E...
Device Pairing
To add a device to an existing BlazeNet network, it will need to be paired to the network. This p...
MAC/PHY Packet Structure
All messages sent over the air take the form of a packet. Packets encapsulate the actual user dat...
Overview
Wireless devices in the network communicate using this custom RF protocol layer. It guarantees re...
Hardware Errata
Collection of some notes on the rev1 coordinator hardware Assembly Combine 100nF capacitors o...
Firmware Notes
This page collects some notes about the host-driven RF firmware, running on the EFR32FG23 chip on...
Host Firmware Notes
Some notes about the Linux host firmware (see this GitHub repo). UARTs don't work in DMA mode ...
Radio PHY
This page describes the physical radio configuration for use in sending packets over the air. 91...
Hardware Errata
This page documents some issues with the hardware. Rev 3 Footprint for RTC backup battery (BT...
Overview
This is a new controller board for the programmable load, designed around the STM32MP1 microproce...
Properties
This page describes the "property request" mechanism, as well as the message format used to inter...
Protocol
This page describes the native communications protocol with the device. It is binary based, with ...
Rear IO Errata
Rev 1 Copper rings around USB connector pads should be larger Retention holes for Ethernet ja...
Front Panel Errata
Rev 1 Mode/load switches footprints need soldermask pulled back from pads The pads are cove...
Adjustments
The driver boards need to have done to work. Rev 1 Current driver zero offset Trimmers: RV301,...
Hardware Errata
This page lists some issues with the hardware. Rev 2 Holes for current sense resistors should...
Hardware Errata
This page lists some issues with CPU board hardware, as they are discovered, and some workarounds...
Clocking
Clock Inputs All clocks on the system are derived from one of the following clock inputs (oscill...
DMA Channel Allocations
DMAC should operate with dynamic, round-robin priority arbitration within a DMA priority level. P...