Pinout

Using 96 position (3x32) DIN 41612 connectors; right angle male on expansion cards, vertical female on the backplane side. The management card uses a 48 position (3x16) DIN 41612 (C2) right angle male connector, with the corresponding vertical female on the backplane side.

CPU Board

	A	B	C
1	+5V	GND	+12V
2	+5V	GND	+12V
3	I2C_SCL¹	/I2C_IRQ¹	I2C_SDA¹
4	GND	GND	GND
5	GND	D8	D13
6	D9	D11	D15
7	D10	D14	D12
8	D7	D5	GND
9	D6	GND	D3
10	GND	D4	D1
11	D2	D0	GND
12	GND	GND	A22
13	A23	GND	A19
14	GND	A21	A17
15	A20	A15	A18
16	A13	A16	A12
17	A14	A10	GND
18	A11	GND	A8
19	GND	A9	A6
20	A7	A4	A2
21	A5	A3	A1
22	R/W	/LDS	/UDS
23	GND	/DTACK¹	/AS¹
24	CLK	GND
25	FC1	FC0	FC2
26
27			/EXTRST¹
28	/EXT⁵	/BG¹	/HALT¹⁴
29	/RESET³⁴	/BR¹	/BGACK¹
30	/IACK¹	/IRQ	/BERR¹⁴
31	GND	GND	GND
32	SNDR	GND	SNDL

Note that the data and address bus, as well as most control signals (those in rows 1-25) are driven through buffers, whose direction is controlled by the bus request lines as to allow external bus masters to access CPU board peripherals. These buffers can be on the backplane or the CPU card.

Any empty cells are not currently used and considered reserved for future use.

Remarks

Pulled up on CPU board
Pulled down on CPU board
Asserted by processor to reset all peripherals. To reset the processor, you must simultaneously assert /HALT for at least 1ms.
This signal is open drain.
Asserted when the currently decoded address is valid and is not decoded on the CPU board. Can be used as part of external buffer logic.

Management Card

This provides power input to the rest of the backplane, and provides connectors for the mixed audio from the backplane.

	A	B	C
1	+5V	+5V	+5V
2	+5V	+5V	+5V
3	+5V	+5V	+5V
4	GND	GND	GND
5	+12V	+12V	+12V
6	GND	GND	GND
7		GND
8		GND
9		GND
10		GND
11		GND
12	/EXTRST	GND
13		GND	I2C_IRQ
14	I2C_SCL	GND	I2C_SDA
15		GND
16	SNDR	GND	SNDL

Any empty cells are not filled in are considered reserved for future use, and should be left unconnected.

Remarks

SNDL/SNDR refers to mixed audio from all cards (CPU + expansion) in the system.
EXTRST: when asserted, the CPU board (and with it, all peripherals on the backplane) are reset. This is equivalent to pushing the reset button on the CPU board, if it has one.

Peripheral

These connectors are provided by peripherals; they're 96-position, 3 row type C DIN 41612 connectors. They shall be right angle, male type.

	A	B	C
1	+5V	GND	+12V
2	+5V	GND	+12V
3	I2C_SCL¹	/I2C_IRQ¹	I2C_SDA¹
4	GND	GND	GND
5	GND	D8	D13
6	D9	D11	D15
7	D10	D14	D12
8	D7	D5	GND
9	D6	GND	D3
10	GND	D4	D1
11	D2	D0	GND
12	GND	GND	A22
13	A23	GND	A19
14	GND	A21	A17
15	A20	A15	A18
16	A13	A16	A12
17	A14	A10	GND
18	A11	GND	A8
19	GND	A9	A6
20	A7	A4	A2
21	A5	A3	A1
22	R/W	/LDS	/UDS
23	GND	/DTACK	/AS
24	CLK	GND
25	FC1	FC0	FC2
26
27	/IRQ_IN¹	GND	/DETECT
28	/IRQ_OUT	/BG	/HALT²
29	/RESET²	/BR²	/BGACK²
30	/IACK	/IRQ²	/BERR²
31	GND	GND	GND
32	SNDR	GND	SNDL

Remarks

Pulled up to +5V by backplane
These signals should be driven as open drain; they're pulled up by either the backplane or CPU board.
If the card doesn't provide sound, tie SNDL/SNDR to ground through a 100kΩ resistor.

Cards should tie /DETECT to GND so that the backplane can detect which slots are occupied, even if the card doesn't have anything on its I²C bus.

Interrupt Arbitration

Peripheral cards arbitrate interrupt priority in slot order. This works by means of a daisy-chained interrupt request line from each slot to the next. The first slot has the daisy chain input tied permanently high. Each peripheral outputs whether it has a pending interrupt on these pins, and then asserts the shared interrupt line. When an interrupt acknowledge cycle takes place, the peripheral with the highest priority – that is, whichever has an /IRQ_IN that's deasserted – responds.

When its interrupt conditions are cleared (from within its ISR,) it will deassert /IRQ_OUT and /IRQ. If there's a lower priority card requiring attention, the interrupt will fire again and it will respond. Otherwise, the processor returns to normal execution.