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Protocol Overview

Reverse Engineering Pax

This is mostly based off of reading the slightly deobfuscated source code of the Pax WebApp and Bluetooth packet logs. All messages for controlling the device seem to go through a single service with UUID 8E320200-64D2-11E6-BDF4-0800200C9A66. Of interest is a...

Message Types

Reverse Engineering Pax

This is a list of all message types as extracted from the Pax mobile application. The names are identical to what the app calls them. Name Description ID Era Pax 3 Read Write Read Write ATTRIBUTE_ACTUAL_TEMP Actual temperature of t...

System Definitions

Emulashione Core

A system’s devices, busses, clock sources, and connections between all of these are defined in system definitions, human readable TOML structures. Most items defined in the definition have an associated name, specified in the name key. This name is unique to ...

Emulation Strategy

Emulashione Core

This page attempts to capture some of the ideas behind how the emulator is implemented, and how it in turn enables devices to be implemented to emulate actual hardware. Devices can be emulated in one of two major ways: either by having the emulation core step...

Pinout

68komputer Backplane

Using 96 position (3x32) DIN 41612 connectors; right angle male on expansion cards, vertical female on the backplane side. The management card uses a 48 position (3x16) DIN 41612 (C2) right angle male connector, with the corresponding vertical female on the ba...

Rev1 Assembly Notes

68komputer 68000 CPU Board

Debug board F202 footprint appears to be too large for the fuse ordered (NANOSMDC050F/13.2-2) F201 is actually 1.1A, not 1.5A as the schematics indicate  Caps under Teensy (C316/C317) could use with being moved a bit U508/U509 package sucks ass C512/C51...

Overview

68komputer Backplane Management

Unlike other expansion boards, this one is required to operate the backplane, primarily to power the system. To connect, it uses a smaller half height (48 position, 3 row) DIN 41612 connector with a unique pinout to interface to the backplane. Additionally, it...

6 Slot Backplane

68komputer Backplane

A backplane which supports up to six expansion cards, meant to go into a 3U VME crate. Features Direction-controlled buffers for address and data bus Mixer for audio from CPU board and expansion slots Detection of installed peripheral cards via detect ...

Expansion

68komputer 68000 CPU Board

Peripherals can be connected to the CPU board through the expansion connector, a 96-pin, 3 row DIN41612 right angle connector. Pinout   A B C 1 +5V GND +12V 2 +5V GND +12V 3 I2C_SCL1 /I2C_IRQ1 I2C_SDA1 4 GND GND GND ...

Revisions

68komputer Backplane Management

This page lists any assembly remarks and issues with each revision of the board. Rev 1 5V power module (U302) sync input should be grounded, to use internal sync. Move capacitors out from under the 5V power module; it causes interference issues Annular r...

Peripheral Allocation

Programmable Load CPU Board

CAN0: Expansion PA22 (TX), PA23 (RX) SERCOM0: I2C, front panel/rear IO (through mux) IOSET1  PA8 (SDA, PAD0), PA9 (SCL, PAD1) SERCOM2: I²C, analog board  PA12 (SDA, PAD0), PA13 (SCL, PAD1) SERCOM3: SPI, analog board IOSET1 PA16 (...

Front Panel

Programmable Load IO

The front panel features a few buttons, indicators, and a rotary encoder. Overview Note that the actual front panel board only covers the right third of the actual front panel: the area with the push buttons, indicators, and rotary encoder. It's mounted to...

Rear Panel

Programmable Load IO

On the rear of the device are a few auxiliary connections, including AC power input, communications (Ethernet, USB) and an external trigger input. Rear panel, as viewed from front (inside) Power A cutout is provided for an IEC mains filter/input module wi...

DMA Channel Allocations

Programmable Load CPU Board

DMAC should operate with dynamic, round-robin priority arbitration within a DMA priority level. Priority levels listed are from 0 (highest) to 3 (lowest.) Ch0: NOR flash SPI Tx empty (SERCOM5) Priority: 2 Operate in SPI 32 bit data mode Burst transfers...

Clocking

Programmable Load CPU Board

Clock Inputs All clocks on the system are derived from one of the following clock inputs (oscillators and internal generators:) Crystals XOSC1: External 12MHz oscillator Provides primary system clock reference XOSC32K: External 32.768kHz oscillato...

Hardware Errata

Programmable Load CPU Board

This page lists some issues with CPU board hardware, as they are discovered, and some workarounds. Rev 1 /I2C_IRQ's external IRQ line conflicts with ENCODER_A Move /I2C_IRQ from PA7 to PA10 Rework required: solder line from pin 11 (/IRQ) of U101 to mid...

Hardware Errata

Programmable Load Load Driver

This page lists some issues with the hardware. Rev 2 Holes for current sense resistors should be slightly larger Datasheet specifies 1.5mm ±0.12mm Increase spacing between heatsink and MOSFET/resistor slightly Right now, the legs need to be bent...

Adjustments

Programmable Load Load Driver

The driver boards need to have done to work. Rev 1 Current driver zero offset Trimmers: RV301, RV302 This adjustment controls the zero offset of the current sense amps. Connect the load to a (current limited) power supply, with a current meter in line. Ens...

Front Panel Errata

Programmable Load IO

Rev 1 Mode/load switches footprints need soldermask pulled back from pads The pads are covered by soldermask. This is bad

Rear IO Errata

Programmable Load IO

Rev 1 Copper rings around USB connector pads should be larger Retention holes for Ethernet jack should be slightly smaller (to accommodate push-in expansion action for mechanical stability)